The Sunflower Tool Suite — Open Hardware Prototypes and Software Platforms for Failure-Prone and Resource-Constrained Embedded Systems


In computing systems research, software tools (notably, simulators) provide low-cost, flexible, and low turn-around time facilities for investigations, but abstract away many hardware details. Hardware implementations on the other hand, provide the ultimate proofs-of-concept, but require hardware design expertise, are usually expensive and inflexible, and are not always designed to expose all possible system parameters to researchers. They are also rarely the subject of active evolution over time as research platforms in their own right, as software tools are.

The Sunflower tool suite is a suite of hardware platforms and simulation tools, intended to address these concerns for energy-resource constrained and failure-prone embedded computing systems. The suite
comprises a full-system (embedded microarchitecture, networking, power, battery, device failure and analog signal modeling) simulator, a miniature energy-scavenging hardware platform, and a handheld
computing device. It is intended to provide a set of complementary platforms for research in micro- and system-architectures for embedded systems, with emphases on energy-efficiency and fault-tolerance,
and this tutorial will provide the audience with a working knowledge of its design, implementation, and usage.

Tutorial Objectives & Audience

The objective of the tutorial is to provide a working knowledge of the use of the Sunflower full-system simulator, and Sunflower hardware platforms, to computing systems researchers. The tutorial covers two main topic areas:

  1. Using and extending the Sunflower full-system simulator;
    the tutorial will detail the implementation of, and the facilities provided by, the Sunflower framework for performing full-system simulation (microarchitecture, networking, power dissipation and supply, failure-modeling, and more,) of networks of embedded systems.

  2. Using the Sunflower hardware platforms;
    the simulation framework is complemented by open hardware platforms, and the tutorial will outline the process of using the hardware platforms in experimental evaluations and research deployments.

Intended audience:
The tutorial is targeted at several potential audiences:

  • Microarchitecture researchers looking for a microarchitectural simulator for embedded systems that provides detailed models of the whole system that surrounds a processor or microcontroller. The tutorial will be of particular interest to researchers investigating systems containing multiple processing elements interconnected in wired or wireless networks, those investigating the interaction of computation with input signals such as sensors, and researchers investigating the effects of soft-errors in embedded computing systems.
  • Sensor network researchers interested in investigating the computational aspects of their protocols and systems software.
  • Systems researchers looking for a platform to enable them to develop compilers and operating systems for embedded systems, that has greater flexibility, transparency and lower cost than hardware, but is also complemented / calibrated against actual available hardware.


There exist an abundance of tools for many aspects of computing systems research, from microarchitectural simulators that are the mainstay of computer architecture research [August et al., 2006; Burger et al., 1996], to networking simulators and other domain-specific tools. Academic research tools are seldom calibrated against specific hardware platforms during their development and evolution, and retrospective comparisons often yield interesting observations [Gibson et al., 2000; Langendoen, 2006]. Even when the simulation platforms are indeed calibrated against hardware, there is seldom the opportunity to evolve the hardware platforms in question. This is due both to the expertise required for implementing hardware designs, as well as the cost of fabrication of hardware prototypes. For high-performance computing systems research, the RAMP platform [Arvind et al., 2005] addresses many of these concerns, providing an open platform for research into multiprocessor architectures.

The goal of the Sunflower tool suite is to provide an actively evolving ecosystem of both hardware prototypes and simulation / analysis tools, for low-power embedded systems, with an emphasis on the investigation of issues relating to energy-efficiency, energy acquisition, fault-tolerance, and impact of hardware deployments on the environment. The need for research directions investigating the role of transient faults in computing systems, e.g., via the specification of dependability constraints by users of a system and by programmers, is echoed in the recent HiPEAC roadmap [De Bosschere et al., 2007].

Figure 1.   Illustrative example of the Sunflower full-system simulator’s organization.

On the side of simulation, the Sunflower full-system simulator [Stanley-Marbell and Marculescu, 2007b] (Figure 1) enables the evaluation of micro- and system-architectures for networked
embedded systems, modeling many aspects of both the hardware platforms and the environments within which they execute.

Figure 2.   System architecture of the Sunflower sensor platform (left), and pictures of the current hardware prototype (right).

The Sunflower sensor platform [Stanley-Marbell and Marculescu, 2007a]
(Figure 2), is one physical realization of components modeled within the Sunflower full-system simulator, enabling the calibration and validation of simulator configurations against real hardware implementations. Additional hardware platforms with complementary hardware capabilities (e.g., wireless communication interfaces and graphical displays) are planned, and it is intended to employ these platforms as a framework for the implementation of ideas by a community of researchers who may not necessarily have interests or expertise in hardware design, but might require specific hardware facilities to enable the investigation of novel software algorithms.

Contributor Profiles

Phillip Stanley-Marbell is a post-doctoral researcher at the Technische Universiteit Eindhoven. He received the PhD in computer engineering from Carnegie Mellon University in 2007, and is the principal architect and implementor of the Sunflower simulation framework and hardware platforms. Prior to, and during his PhD, he held industrial positions at Bell-Labs (Lucent Microelectronics), Philips Consumer Communications, and NEC research labs. His research interests include deviation-tolerant computation, energy-resource-constrained and failure-prone

Diana Marculescu received the Dipl. Eng. degree in computer science from University Politehnica of Bucharest, Romania, in 1991, and the Ph.D. degree in computer engineering from the University of Southern California, Los Angeles, in 1998. She is currently an Associate Professor of Electrical and Computer Engineering at Carnegie Mellon University, Pittsburgh, PA. Her research interests include energy-aware computing, CAD tools for low-power systems, and emerging technologies (such as electronic textiles or ambient intelligent systems).

Dr. Marculescu is the recipient of a National Science Foundation Faculty Career Award (2000-2004), an ACM-SIGDA Technical Leadership Award (2003), and the Carnegie Institute of Technology George Tallman Ladd Research Award (2004). She was an IEEE Circuits and Systems Society Distinguished Lecturer (2004-2005) and is the Chair of the ACM Special Interest Group on Design Automation (SIGDA).



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